Micron integrates error management techniques with its NAND products with ClearNAND.
As semiconductor circuity shrinks, data error rates increase, calling for more sophisticated error correction code (ECC).
ClearNAND eliminates the ECC burden from the host processor through an application-specific integrated circuit (ASIC) and an 8 byte capacity NAND die acting a data collection cache.
The ClearNAND itself appears as a standard NAND interface to the host processor.
Micron uses its 25nm MLC process Continue reading...